CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 37

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.10.2.1.6 External pixel reset voltage for multiple slope (bit 11)
When bit V
voltage is disabled and the voltage externally applied to pin V
double/multiple slope reset voltage.
When bit V
multiple slope operation) can be monitored on pin V
3.10.2.2 N
After the internal x_sync is generated (start of the pixel readout of a particular row), the
P
reaches the value loaded in the N
at the same clock cycle this number have to be divided by 2 (N
ROI / 2) - 1).
3.10.2.3 N
After the internal yl_sync is generated (start of the frame readout with Y
counter increases with each Y
N
3.10.2.4 INT_TIME register (11:0)
The I
interpretation of the I
synchronous).
Synchronous shutter
After the S
granulated clock cycles until it reaches the value loaded in the I
T
pulse to stop the integration. When the I
integration time is:
This maximum time can be increased if an external counter is used to trigger S
The minimal value that should be loaded into the I
3.10.2.1.4).
Rolling shutter
When the Y
generate the yl_sync pulse for the left Y-shift register (read out Y-shift register). This
loads the left Y-shift register with the pointer loaded in Y
Y_CLOCK pulse, the pointer shifts to the next row and the integration time counter
increases until it reaches the value loaded in the I
IXEL_VALID
IME_OUT
ROF
Contact
Cypress Semiconductor Corporation
IBIS5-A-1300
_
NT_TIME
LINES
T
Datasheet
INT_MAX
ROF_PIXELS
ROF_LINES
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pulse is generated. This T
DDR_RIGHT_EXT
S_START
DDR_RIGHT_EXT
register and an L
_START
signal goes high. The P
register is used to set the integration time of the electronic shutter. The
= 2
12
register (11:0)
pulse is applied (start of the frame readout), the sequencer will
* 256 (maximum granularity) * (40 MHZ)
pulse is applied an internal counter counts the number of SS
register (11:0)
NT_TIME
is set to “1”, the circuit that generates the variable pixel reset
AST_LINE
Document #: 38-05710 Rev.**(Revision 1.3)
is set to “0” the variable pixel reset voltage (used for
_CLOCK
ROF
3901 North First Street
depends on the chosen shutter type (rolling or
_
IME_OUT
IXEL_VALID
PIXEL
pulse is generated.
pulse until it reaches the value loaded in the
register. Due to the fact that 2 pixels are read
NT_TIME
pulse can be used to generate the S
signal goes low when the pixel counter
NT
DDR_RIGHT
_
TIME
NT_TIME
San Jose, CA 95134
register is used the maximum
register. At that moment, the
DDR_RIGHT
.
L
-1
register is 10 (see also
_
ROF_PIXELS =
NT_TIME
= 26.2 ms.
REG
Page 37 of 67
register. At each
_START
408-943-2600
register and a
is used as the
), the line
(width of
S_STOP
S_STOP
.