CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 35

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.10.2 Detailed description of the internal registers
3.10.2.1 Sequencer register (7:0)
3.10.2.1.1 Shutter type (bit 0)
The IBIS5-A-1300 image sensor has 2 shutter types:
3.10.2.1.2 Output amplifier calibration (bits 1 and 2)
Bits F
amplifier.
During every row-blanking period, a calibration is done of the output amplifier. There are
2 calibration modes. The F
so accurate and suffers from KTC noise, while the S
incremental adjustments and is noise free.
Approximately 200 or more “slow” calibrations will have the same effect as 1 “fast”
calibration.
Different calibration modes can be set at the beginning of the frame (F
bit) and for every subsequent line that is read (L
frame is defined by the Y
new row.
3.10.2.1.3 Continuous charge (bit 3)
For some applications it might be necessary to use continuous charging of the pixel
columns instead of a pre-charge on every line sample operation.
Setting bit C
P
3.10.2.1.4 Internal clock granularities (bits 4, 5, 6 and 7)
The system clock is divided several times on chip.
The X-shift-register that controls the column/pixel readout, is clocked by half the system
clock rate. Odd and even pixel columns are switched to 2 separate buses. In the output
amplifier the pixel signals on the 2 buses are combined into one pixel stream at the same
frequency as S
The clock, that drives the “snapshot” or synchronous shutter sequencer, can be
programmed using the bits G
This way the integration time in synchronous shutter mode can be a multiple of 32, 64,
128 or 256 times the system clock period. To overcome global reset issues it is advised
C_CMD
Contact
Cypress Semiconductor Corporation
IBIS5-A-1300
RAME_CAL_MODE
0 =
1 =
Datasheet
is used to control the current level on every pixel column.
[e-mail]
ONT_CHARGE
YS
synchronous shutter.
rolling shutter.
_
CLOCK
.
and L
_START
to “1” will activate this function. The resistor connected to pin
AST
RAN_SS_SEQ_MSB
Document #: 38-05710 Rev.**(Revision 1.3)
INE_CAL_MODE
mode (= 0) can force a calibration in one cycle but is not
input (see lower), Y_
3901 North First Street
(bit 7) and G
define the calibration mode of the output
INE_CAL_MODE
LOW
CLOCK
San Jose, CA 95134
RAN_SS_SEQ_LSB
mode (= 1) can only make
defines the beginning of a
bit). The beginning of a
Page 35 of 67
RAME_CAL_MODE
408-943-2600
(bit 6).