CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 17

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.4.2.2 Dual shutter supply considerations
With the supply settings listed in Table 8 some fixed column non-uniformities (FPN) can
be seen when operating in rolling shutter mode. If a dual shutter mode (both rolling and
snapshot shutter) is required during operation one need to apply the supply settings listed
in Table 9 below to achieve the best possible image quality.
3.4.3 Image core biasing signals
Table 10 summarizes the biasing signals required to drive the IBIS5-A-1300. For
optimizations reasons with respect to speed and power dissipation of all internal block
several biasing resistors are needed.
Signal
DEC_CMD
DAC_VHIGH
DAC_VLOW
AMP_CMD
COL_CMD
PC_CMD
ADC_CMD
ADC_VHIGH
ADC_VLOW
Contact
Cypress Semiconductor Corporation
IBIS5-A-1300
Datasheet
[e-mail]
Symbol
VDDH
VDDR_LEFT
VDDC
VDDA
VDDD
GNDA
GNDD
GND_AB
Comment
Connect to VDDA with R = 50kΩ and
decouple to GNDA with C = 100 nF.
Connect to VDDA with R = 0 Ω.
Connect to GNDA with R = 0 Ω.
Connect to VDDA with R = 50kΩ and
decouple to GNDA with C = 100 nF.
Connect to VDDA with R = 50kΩ and
decouple to GNDA with C = 100 nF.
Connect to VDDA with R = 25kΩ and
decouple to GNDA with C = 100 nF.
Connect to VDDA with R = 50kΩ and
decouple to GNDA with C = 100 nF.
Connect to VDDA with R = 90Ω and
decouple to GNDA with C = 100 nF.
Connect to GNDA with R = 360Ω and
Table 9: Dual shutter recommended supply settings
Document #: 38-05710 Rev.**(Revision 1.3)
Table 10: Overview of bias signals
Parameter
Voltage on HOLD switches.
Highest reset voltage.
Pixel core voltage.
Analog supply voltage of the
image core.
Digital supply voltage of the image
core.
Analog ground.
Digital ground.
Anti-blooming ground.
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Related module
Decoder stage.
High level of DAC.
Low level of DAC.
Output amplifier stage.
Columns amplifiers
stage.
Pre-charge of column
busses.
Analog stage of ADC.
High level of ADC.
Low level of ADC.
San Jose, CA 95134
Typ
+4.5
+4.5
+3.0
+3.3
+3.3
0
0
0
Page 17 of 67
Unit
V
V
V
V
V
V
V
V
408-943-2600
DC-level
1.0 V
3.3 V
0.0 V
1.2 V
1.0 V
1.1 V
1.0 V
2.9 V
1.4 V