QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 30

• Manufacturer Part Number: QT2032-EKG-1A2
• Manufacturer: Applied Micro Circuits Corporation

Specifications of QT2032-EKG-1A2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

QT2022/32 - Data Sheet: DS3051
6.2.2 Line Timing
Line timing permits the TX Fiber Output to derive timing from the RX Fiber Input. This mode is useful for applica-
tions where it is necessary or desirable for the TX Fiber Output to be synchronous with equipment at the far end.
For example, the Fiber Interface may connect to a SONET ADM (Add/Drop Multiplexer) which directs synchronous
SONET payloads to one of several line outputs.
Three line timing control modes are provided: Line Timing Disabled, Automatic Line Timing, and Forced Line Tim-
ing. The Automatic Line Timing control mode is supported only in WAN mode. The line timing control mode is
determined by the MDIO line timing control bits 1.C001h.9 and 1.C001h.14 which are interpreted as described in
Table 5, “Line Timing Control Modes”.
Table 5:
In WAN mode, by default for all Line Timing Control Modes, the synchronization status message (SSM) in the
transmitted WIS S1 byte is DUS “Don’t Use for Synchronization” (1111). This indicates to the far end equipment
that this timing signal should not be used as a timing reference, e.g, for line timing. For more information on SSMs
see Telcordia GR-253-CORE Issue 3 Section 5.4.2.
To meet SONET jitter transfer requirements, the external VCXO must be implemented and used in Line Timing
mode. See Section 6.2.4 on page 32 for details.
Line Timing Disabled Mode
The Line Timing Disabled mode is the default Line Timing mode. In this mode, line timing is fully disabled. This
mode is used in applications where the TX Fiber Output is intended to always derive timing from a local frequency
source such as a crystal oscillator. In WAN mode, the TX Fiber Output will always derive timing from SREFCLK or
VCXOI in VCXOONLY mode. In LAN mode, the TX Fiber Output will always derived timing from either EREFCLK
or TXPLLOUT.
30
Force Line Timing
0
0
1
1.C001h.9
Line Timing Control Modes
0
1
x
Automatic Line Timing
1.C001h.14
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Line Timing Disabled
In WAN mode the TX Fiber Output always derives timing from SREFCLK (or
VCXOI in VCXOONLY mode).
In LAN mode the TX Fiber Output always derives timing from EREFCLK or
TXPLLOUT.
Refer to section Section on page 30.
Automatic Line Timing
In WAN mode only, the TX Fiber Output derives timing from the recovered clock
from the RX Fiber Input when the RX Fiber Input is not failed. When the RX Fiber
Input is failed, the TX Fiber Output derives timing from SREFCLK (or VCXOI in
VCXOONLY mode).
Refer to section Section on page 31.
Forced Line Timing
In WAN or LAN mode, the TX Fiber Output always derives timing from the
recovered clock from the RX Fiber Input.
Refer to section Section 6.2.3 on page 32.
Line Timing Mode
Revision 5.11