QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 64

• Manufacturer Part Number: QT2032-EKG-1A2
• Manufacturer: Applied Micro Circuits Corporation

Specifications of QT2032-EKG-1A2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

QT2022/32 - Data Sheet: DS3051
RX_ALARM
RX_ALARM is used to indicate that a fault has occurred on the receive path. RX_ALARM is the bitwise OR of the-
receive path status register bits in register 1.9003h. RX_ALARM can be programmed to assert only when specific
receive path fault conditions are present. The programming is performed by writing to a mask register at address
1.9000h. The contents of register 1.9003h is AND’ed with register 1.9000h prior to application of the OR function to
generate the RX_ALARM signal.
RX_ALARM = {OR of (reg 1.9003.n ‘bit wise AND’ reg 1.9000.n) for n=0..9})
Table 24: Receive Alarm Registers (RX_ALARM)
1.
2.
64
PHY_XS Receive Local Fault
(MDIO 4.8.10 = 1.0008.a h)
rx_flag
PCS Receive Code Violation
PCS Receive Local Fault
PMA Receive Local Fault
Receive Optical Power Fault
PHY_XS Receive Rate Error
WIS Alarm Interrupt Flag
WIS Extended Alarm Interrupt
Flag
WIS Local Fault
Reserved, set to 0
undefined if LEGACY = 1.
Valid in QT2032 WAN mode only. In QT2022, these alarms are Reserved, RO (including QT2032 in LAN mode).
2
Description
2
2
1
NOT (XAUI PLL locked)
bitwise OR of rx_flag register, 1.9007h
invalid 66b code word detected
NOT(block_lock)
NOT(Receive PLL
Lock)
(linked to 1.8.10)
1.A071h.7 OR
1.A071h.6
Receive FIFO overflow/underflow error
(4.C002h.7 OR 4.C002h.6)
bitwise OR of WIS ALARM INTERRUPT
register, 2.33 (2.21h)
bitwise OR of WIS EXTENDED ALARM
INTERRUPT register, 2.C502h
NOT(SONET frame sync)
(linked to 2.1.7)
(linked to 3.8.10)
LEGACY=0
AppliedMicro - Confidential & Proprietary
Definition
NOT(Receive PLL
Lock) or
RXLOSB_I==0
(linked to 1.8.10)
Reserved, RO
LEGACY=1
1.9003.0
1.9003.1
1.9003.2
1.9003.3
1.9003.4
1.9003.5
1.9003.6
1.9003.7
1.9003.8
1.9003.9
1.9003.f:a
MDIO Status Register
16b hex
(RO)
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO
RO/LH
RO
RO
RO/LH
RO
type
MDIO Enable Register (R/
1.9000.0
1.9000.1
1.9000.2
1.9000.3
1.9000.4
1.9000.5
1.9000.6
1.9000.7
1.9000.8
1.9000.9
1.9000.f:a
16b hex
W)
Revision 5.11
1
0
0
1
1
1, LEGACY=0
0, LEGACY=1
0
0
0
0
0
default value