QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 36

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QT2032-EKG-1A2

Manufacturer Part Number
QT2032-EKG-1A2
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of QT2032-EKG-1A2

Lead Free Status / RoHS Status
Supplier Unconfirmed
QT2022/32 - Data Sheet: DS3051
7 WAN Interface Sublayer (WIS) Description (QT2032 Only)
This section describes the function and extended features of the WIS block in the QT2032. The WIS block is
enabled and the chip will operate in WAN mode when LANMODE = 0. The WIS block can be bypassed by setting
MDIO register 2.7.0 to 0 or if LANMODE = 1. When bypassed, the QT2032 will be 10GE (or 10GFC) protocol
compliant.
7.1 WIS Transmitter
The WIS transmitter functionality is illustrated in Figure 10 and is fully compliant with IEEE 802.3-2005 Clause 50.
Additionally, extended features have been provided for APS Channel, synchronization status, line BIP-8 signal fail
& degrade, pointer justification event counters, 64-byte J1 messaging, and transport overhead (TOH) serial inter-
face. These features are described in Section 7.3, “Extended WIS Features,” on page 46.
7.1.1 WIS Frame
Figure 10 illustrates the structure of an STS-192c WIS frame, which is comprised of transport overhead and a pay-
load. The overhead fields are described in the following sections.
Figure 10: WIS Frame Structure
36
Column
1
A1
B1
H1
B2
S1
192 193
A1
B2 K1
H1 H2
AppliedMicro - Confidential & Proprietary
A2
M1
195
384 385 386
A2 J0 Z0
H2 H3
K2
576 577 578
Z0 J1
H3
Overhead
Path
B3
C2
G1
F
I
X
E
D
S
T
U
F
F
640 641 642
F
I
X
E
D
S
T
U
F
F
133-
120
116-
480
0 1
116-
133-
121
481
Payload Capacity
133-
149-
17-
279
118
166-
758
38
Revision 5.11
133-
149-
119
759
16-
639
17-
280