QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 79

• Manufacturer Part Number: QT2032-EKG-1A2
• Manufacturer: Applied Micro Circuits Corporation

Specifications of QT2032-EKG-1A2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

10 Two Wire (EEPROM) Interface
The EEPROM interface is a standard two-wire interface that can be used as a master to control peripheral devices
or as a slave to allow control by other devices. The primary application for this interface is in a module application
to support an external EEPROM device for module NVR configuration and a DOM device for optical performance
monitoring. This feature is based on the XENPAK MSA. In XFP mode, this interface can be used to communicate
with an XFP module. An external microcontroller is able to control and access the QT2022/32 memory space via
this interface.
The EEPROM serial interface consists of pins EEPROM_SCL and EEPROM_SDA. The logic levels for this inter-
face are 0 and 1.2 Volts and is 3.3V tolerant. The EEPROM_SCL output clock is only active when accessing a
peripheral device. The default clock rate is 37kHz. Clock stretching is supported.
The bidirectional EEPROM_SDA pin is an open drain active pull down driver for data transfer and may be wire-
Or’ed with other open drain devices. It requires an external pullup resistor to 3.3V.
EEPROM_SCL is an output during normal operation. It requires an external pullup resistor to 3.3V. When the
EEPROM_SCL clock signal is inactive, it is in a high impedance state. EEPROM_SCL is also bidirectional to allow
an external device to control the I2C bus. The multi-master mode is supported through bus arbitration. The
QT2022/32 can act as a slave device.
Figure 24: EEPROM_SDA Open Drain Driver Configuration
The EEPROM slave address for the XENPAK NVR is hardwired to 1010000. Data bytes are 8 bits. The word
address bytes are 8 bits for a total of 256 word addresses. Each EEPROM device register is mirrored in an MDIO
register within the QT2022/32. EEPROM registers 0-255 are mapped to MDIO registers 1.8007h to 1.8106h.
When the control pin EEPROM_PROT is high writes are blocked to the MDIO registers corresponding to EEPROM
registers 0 to PL and PU to 255 inclusive. PL is set equal to one less than the customer field address, which is read
from EEPROM register 6 and stored in MDIO register 32781 (800dh). PU is set equal to the vendor field address
which is read from EEPROM register 7 and stored in MDIO register 32782 (800eh). If the uploaded customer field
address is greater than or equal to the vendor field address then PL and PU will revert to their default values. The
default value for PL is 82 (this corresponds to MDIO register 32857, 8059h). The default value for PU is 167 (this
corresponds to MDIO register 80AEh).
Revision 5.11
receive buffer
AppliedMicro - Confidential & Proprietary
open drain
driver
COREGND
EEPROM_SDA pin
3.3V
pullup
R=15 kΩ
load capacitance
10 pF
QT2022/32 - Data Sheet: DS3051
79