QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 81

• Manufacturer Part Number: QT2032-EKG-1A2
• Manufacturer: Applied Micro Circuits Corporation

Specifications of QT2032-EKG-1A2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 34: XENPAK EEPROM Register Map (Continued)
a bits 15:8 of the MDIO registers are reserved (RO) and will return a value of 0 when read.
10.1 EEPROM Data Transfer Timing
10.1.1 Data Transfer
The data on the EEPROM_SDA line must be stable during the HIGH period of the clock EEPROM_SCL. The HIGH
or LOW state of the data line can only change when EEPROM_SCL is LOW.
Figure 25: Data Bit Transfer
10.1.2 Start and Stop Conditions
A HIGH to LOW transition on the EEPROM_SDA line while EEPROM_SCL is high defines a START condition. A
LOW to HIGH transition on the EEPROM_SDA line while EEPROM_SCL is high defines a STOP condition. START
and STOP conditions are generated by the bus master
Figure 26: Start and Stop Conditions
Revision 5.11
:
255
EEPROM reg
address
FF
EEPROM_SDA
EEPROM_SDA
EEPROM_SCL
EEPROM_SCL
33030
address
8106
MDIO register
AppliedMicro - Confidential & Proprietary
Start Condition
bits 7:0 default
00
value
S
data line stable
data valid
a
change
of data
allowed
XENPAK MSA Description
QT2022/32 - Data Sheet: DS3051
Stop Condition
P
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