QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 84

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QT2032-EKG-1A2

Manufacturer Part Number
QT2032-EKG-1A2
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of QT2032-EKG-1A2

Lead Free Status / RoHS Status
Supplier Unconfirmed
QT2022/32 - Data Sheet: DS3051
Figure 29: EEPROM 8 Byte Page Write Cycle Timing
10.4 EEPROM Single Byte Read or Write Cycle
An EEPROM Single Byte Read/Write Cycle is initiated by setting MDIO EEPROM control register bits 1.32768.1:0
(1.8000h.1:0) to 10. As for the 256 byte read/write commands, MDIO register 1.8000h.5 determines if a read or a
write cycle will be performed. The single byte EEPROM address is read from EEPROM control register bits
1.8000h.15:8. The data is read to or from the associated MDIO register.
If an NVR command is in progress, then no new NVR command will be accepted. The NVR command register
must be in the idle state for any new NVR commands to be accepted. A DOM command request will be queued if
an NVR command is in progress.
10.5 XENPAK Diagnostic Optical Monitoring (DOM)
Diagnostic Optical Monitoring (DOM) is performed using an external device, hereafter referred to as the DOM
device. All analog signal measurement and calibration will be done by the DOM device. No analog signal measure-
ment is done by the QT2022/32.
NOTE: This feature applies only to XENPAK type applications (XFP=0). For an XFP application, the QT2022/32
will disable the XENPAK DOM functionality when the XFP pin is driven high (XFP=1). The XFP DOM information
will be stored in the QT2022/32 EEPROM memory space (Register 1.8007-1.8106h).
The 256 8-bit registers of the DOM device will be accessed via the QT2022/32 EEPROM bus and transferred to
MDIO registers 1.A000-1.A0FFh.
Communication between the Station management Entity (STA) and the module will be done via the QT2022/32
MDIO interface only.
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S
S
T
A
R
T
1 0
slave address
1
0
random access write to word address 0
0 0 0
AppliedMicro - Confidential & Proprietary
W
R
I
T
E
0
A
A
C
K
address byte
0 0
00000000
0 0 A d7 d6 d1 d0
A
C
K
data byte 0
A
A
C
K
data bytes 2 - 6
d7 d6 d1 d0
A
A
C
K
EEPROM
PHY
data byte 7
d7 d6 d1 d0
A
C
K
P
S
T
O
P
Revision 5.11