UJA1066TW/5V0,518 NXP Semiconductors, UJA1066TW/5V0,518 Datasheet - Page 10

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UJA1066TW/5V0,518

Manufacturer Part Number
UJA1066TW/5V0,518
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1066TW/5V0,518

Number Of Transceivers
1
Power Down Mode
Sleep/Standby
Standard Supported
ISO 11898-2
Operating Supply Voltage (min)
5.5V
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
UJA1066_2
Product data sheet
6.2.5 Standby mode
Entering Normal mode does not activate the CAN transceiver automatically. The CAN
Mode Control (CMC) bit must be set to activate the CAN medium if required, allowing
local cyclic wake-up scenarios to be implemented without affecting the CAN-bus.
In Standby mode, the system is in a reduced current consumption state. Entering Standby
mode overrides the CMC bit, allowing the CAN transceiver to enter the low-power mode
autonomously. The watchdog will, however, continue to monitor the microcontroller
(Time-out mode) since it is powered via pin V1.
If the host microcontroller supports a low-power Standby or Stop mode with reduced
current consumption, the watchdog can be switched off entirely when the SBS is in
Standby mode. The SBC will monitor the microcontroller supply current to ensure that no
unobserved phases occur while the watchdog is disabled and the microcontroller is
running. The watchdog will remain active until the supply current drops below I
when it will be disabled.
Should the current increase to I
application specific hardware) the watchdog will start operating again with the previously
used time-out period. If the watchdog is not triggered correctly, a system reset will occur
and the SBC will enter Start-up mode.
If Standby mode is entered from Normal mode with the selected watchdog OFF option,
the watchdog will use the maximum time-out as defined for Standby mode until the supply
current drops below the current detection threshold; the watchdog is now OFF. If the
current increases again, the watchdog will be activated immediately, again using the
maximum watchdog time-out period. If the watchdog OFF option is selected during
Standby mode, the watchdog period last used will define the time for the supply current to
fall below the current detection threshold. This allows the user to align the current
supervisor function with the requirements of the application.
Generally, the microcontroller can be activated from Standby mode via a system reset or
via an interrupt without reset. This allows for the implementation of differentiated start-up
behavior from Standby mode, depending on the needs of the application:
When an interrupt event occurs, the application software has to read the Interrupt register
within t
entered. If the application has read out the Interrupt register within the specified time, it
can decide whether to switch to Normal mode via an SPI access or to remain in Standby
mode.
The following operations are possible from Standby mode:
If the watchdog is still running during Standby mode, it can be used for cyclic wake-up
behavior of the system. A dedicated Watchdog Time-out Interrupt Enable (WTIE) bit
allows the microcontroller to decide whether to receive an interrupt or a hardware
reset upon overflow. The interrupt option will be cleared in hardware automatically
with each watchdog overflow to ensure that a failing main routine is detected while the
interrupt service is still operating. So the application software must set the interrupt
behavior before each standby cycle begins.
Any wake-up via the CAN-bus together with a local wake-up event will force a system
reset event or generate an interrupt to the microcontroller. So it is possible to exit
Standby mode without performing a system reset if necessary.
RSTN(INT)
. Otherwise a fail-safe system reset is forced and Start-up mode will be
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 17 March 2010
thH(V1)
(e.g. as result of a microcontroller wake-up from
High-speed CAN fail-safe system basis chip
UJA1066
© NXP B.V. 2010. All rights reserved.
thL(V1)
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