UJA1066TW/5V0,518 NXP Semiconductors, UJA1066TW/5V0,518 Datasheet - Page 22

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UJA1066TW/5V0,518

Manufacturer Part Number
UJA1066TW/5V0,518
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1066TW/5V0,518

Number Of Transceivers
1
Power Down Mode
Sleep/Standby
Standard Supported
ISO 11898-2
Operating Supply Voltage (min)
5.5V
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
UJA1066_2
Product data sheet
6.7.4.1 TXDC dominant clamping
6.7.4.2 RXDC recessive clamping
6.7.3 Termination control
6.7.4 Bus, RXD and TXD failure detection
In Active mode, On-line mode and On-line Listen mode, CANH and CANL are terminated
to 0.5 × V
is disabled due to an overload condition both pins become floating.
The UJA1066 can distinguish between bus, RXD and TXD failures as indicated in
All failures are signalled individually in the CANFD bits in the System Diagnosis register.
Any change (detection and recovery) generates a CANFI interrupt to the microcontroller, if
the interrupt is enabled.
Table 3.
If the TXDC pin is clamped dominant for longer than t
be disabled. After the TXDC pin becomes recessive, the transmitter is reactivated
automatically when bus activity is detected or can be reactivated manually by setting and
clearing the CTC bit.
If the RXDC pin is clamped recessive while the CAN-bus is dominant, the CAN transmitter
will be disabled. The transmitter will be reactivated automatically when RXDC becomes
dominant or can be reactivated manually by setting and clearing the CTC bit.
Failure
HxHIGH
HxGND
LxHIGH
LxGND
HxL
Bus dom
TXDC dom
RXDC reces
RXDC dom
Fig 9.
CAN wake-up timing diagram.
V2
wake-up
CAN-bus, RXD and TXD failure detection
CANH
CANL
via R
All information provided in this document is subject to legal disclaimers.
i
. In Off-line mode CANH and CANL are terminated to GND via R
Rev. 03 — 17 March 2010
CANH short-circuit to V
pin RXDC is continuously clamped recessive
pin RXDC is continuously clamped dominant
Description
CANH short-circuit to GND
CANL short-circuit to V
CANL short-circuit to GND
CANH short-circuit to CANL
bus is continuously clamped dominant
pin TXDC is continuously clamped dominant
t
CAN(dom1)
High-speed CAN fail-safe system basis chip
CC
CC
, V
, V
BAT14
BAT14
t
CAN(reces)
TXDC(dom)
or V
or V
BAT42
BAT42
, the CAN transmitter will
t
CAN(dom2)
UJA1066
© NXP B.V. 2010. All rights reserved.
001aad446
Table
i
22 of 70
. If V2
3.

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