NP5Q128A13ESFC0E Micron Technology Inc, NP5Q128A13ESFC0E Datasheet - Page 24

• Manufacturer Part Number: NP5Q128A13ESFC0E
• Manufacturer: Micron Technology Inc

Specifications of NP5Q128A13ESFC0E

• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.1
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Write enable (WREN)
The write enable (WREN) instruction
The write enable latch (WEL) bit must be set prior to every page program (PP), dual input
fast program (DIFP), sector erase (SE), bulk erase (BE), write status register (WRSR)
instruction.
The write enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 6.
Write enable (WREN) instruction sequence
S
C
DQ0
DQ1
High Impedance
0
(Figure
1
2
Instruction
3
6) sets the write enable latch (WEL) bit.
4
5
6
7
AI13731