N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 120

• Manufacturer Part Number: N25Q128A11B1240E
• Manufacturer: NUMONYX

Specifications of N25Q128A11B1240E

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 7ns
• Interface Type: Serial (SPI)
• Boot Type: Bottom
• Address Bus: 1b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: TBGA
• Program/erase Volt (typ): 1.7 to 2/8.5 to 9.5V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 8b
• Number Of Words: 16M
• Supply Current: 20mA
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.2.8
120/185
DQ0
DQ0
DQ1
DQ1
C
S
C
S
Figure 52. Program OTP instruction sequence DIO-SPI
Subsector Erase (SSE)
For devices with bottom or top architecture, at the bottom (or top) of the addressable area
there are 8 boot sectors, each one having 16 4Kbytes subsectors. The Subsector Erase
(SSE) instruction sets to '1' (FFh) all bits inside the chosen subsector. Before it can be
accepted, a Write Enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the address on the two pins DQ0 and
DQ1, the instruction functionality is exactly the same as the Subsector Erase (SSE)
instruction of the Extended SPI protocol, please refer to
(SSE)
Figure 53. Subsector Erase instruction sequence DIO-SPI
0
Instruction
1
for further details.
2
0
3
Instruction
23 21 19 17
22 20 18 16
4
1
5
2
6
7
3
24-Bit Address
15 13 11 9
14 12 10 8
8
23 21 19 17
22 20 18 16
4
9 10 11
5
6
12 13 14 15
7
6
7
5
4
24-Bit Address
3
2
15 13 11
14 12 10
8
1
0
9
16 17 18 19
7
6
Data Byte 1
5
4
10 11
Section 9.1.17: Subsector Erase
3
2
9
8
1
0
20 21 22 23 24 25 26 27
7
6
12 13 14 15
7
Data Byte 2
6
5
4
5
4
3
2
1
Dual_S ubsector_E rase
0
3
2
Dual_Program_OTP
7
6
Data Byte n
1
0
5
4
3
2
1
0