N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 149

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N25Q128A11B1240E

Manufacturer Part Number
N25Q128A11B1240E
Description
Manufacturer
NUMONYX
Datasheet

Specifications of N25Q128A11B1240E

Cell Type
NOR
Density
128Mb
Access Time (max)
7ns
Interface Type
Serial (SPI)
Boot Type
Bottom
Address Bus
1b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
TBGA
Program/erase Volt (typ)
1.7 to 2/8.5 to 9.5V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
8b
Number Of Words
16M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Supplier Unconfirmed
9.3.16
DQ0
DQ1
DQ3
DQ2
S
C
Figure 90. Read Lock Register instruction and data-out sequence QIO-SPI
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed.
Apart form the parallelizing of the instruction code, the address and the input data on the
four pins DQ0, DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the
Write to Lock Register (WRLR) instruction of the Extended SPI protocol, please refer to
Section 9.1.25: Write to Lock Register (WRLR)
Instruction
0
1
21 17 13 9
20 16 12 8
2
22 18 14 10 6
23 19 15 11 7
3
24-bit address
4
5
6
5
4
7
1
0
2
3
8
5
4
6
7
for further details.
9 10 11 12 13 14 15
1
0
3
2
Lock Register Out
5
4
7
6
1
0
3
2
4
5
7
6
0
1
3
2
4
5
7
6
0
1
3
2
Quad_Read_LR
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