N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 131

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N25Q128A11B1240E

Manufacturer Part Number
N25Q128A11B1240E
Description
Manufacturer
NUMONYX
Datasheet

Specifications of N25Q128A11B1240E

Cell Type
NOR
Density
128Mb
Access Time (max)
7ns
Interface Type
Serial (SPI)
Boot Type
Bottom
Address Bus
1b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
TBGA
Program/erase Volt (typ)
1.7 to 2/8.5 to 9.5V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
8b
Number Of Words
16M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Supplier Unconfirmed
9.2.25
S
C
DQ0
DQ1
Figure 69. Write Volatile Enhanced Configuration Register instruction sequence
Deep Power-down (DP)
The Deep-Power-down (DP) instruction sets the device in Deep Power-down mode. Apart
form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the instruction
functionality is exactly the same as the Deep Power-down (DP) instruction of the Extended
SPI protocol. The instruction sequence is shown in
sequence.
Figure 70. Deep Power-down instruction sequence
DQ0
DQ1
C
S
0
Instruction
1
DIO-SPI
2
3
0
Instruction
1
2
3
7
6
4
t
DP
Configuration Register In
5
4
5
Byte
Standby mode
Volatile Enhanced
3
2
6
1
0
Figure 70: Deep Power-down instruction
7
7
6
8
5
4
9 10 11
Deep power-down mode
Byte
Dual_Write_VECR
3
2
1
0
Dual_DP
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