N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 143
N25Q128A11B1240E
Manufacturer Part Number
N25Q128A11B1240E
Description
Manufacturer
NUMONYX
Datasheet
1.N25Q128A11B1240E.pdf
(185 pages)
Specifications of N25Q128A11B1240E
Cell Type
NOR
Density
128Mb
Access Time (max)
7ns
Interface Type
Serial (SPI)
Boot Type
Bottom
Address Bus
1b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
TBGA
Program/erase Volt (typ)
1.7 to 2/8.5 to 9.5V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
8b
Number Of Words
16M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Supplier Unconfirmed
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9.3.9
Figure 83. Subsector Erase instruction sequence QIO-SPI
Sector Erase (SE)
The Sector Erase (SE) instruction sets to '1' (FFh) all bits inside the chosen sector. Before it
can be accepted, a Write Enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the address on the four pins DQ0,
DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Sector Erase
(SE) instruction of the Extended SPI protocol, please refer to
(SE)
Figure 84. Sector Erase instruction sequence QIO-SPI
for further details.
DQ0
DQ2
DQ1
DQ3
DQ0
DQ2
C
DQ1
DQ3
S
S
C
Instruction
Instruction
0
0
1
1
2
20 16 12 8
21 17 13 9
22 18 14 10
23 19 15 11 7
2
21 17 13 9
20 16 12 8
22 18 14 10
23 19 15 11 7
24-Bit Address
3
24-Bit Address
3
Quad_Subsector_Erase
4
4
5
5
6
6
4
5
6
7
Quad_Sector_Erase
6
4
5
2
0
1
3
7
8
2
0
1
3
9
8
Section 9.1.18: Sector Erase
9
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