MT29F1G08ABADAWP-IT:D Micron Technology Inc, MT29F1G08ABADAWP-IT:D Datasheet - Page 21

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MT29F1G08ABADAWP-IT:D

Manufacturer Part Number
MT29F1G08ABADAWP-IT:D
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F1G08ABADAWP-IT:D

Lead Free Status / Rohs Status
Compliant

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Asynchronous Data Input
Figure 13: Asynchronous Data Input Cycles
PDF: 09005aef83e5ffed
m68a.pdf – Rev. D 06/10 EN
WE#
I/Ox
CE#
ALE
CLE
Data is written to the cache register of the selected die (LUN) on the rising edge of WE#
when CE# is LOW, ALE is LOW, CLE is LOW, and RE# is HIGH.
Data input is ignored by die (LUNs) that are not selected or are busy (RDY = 0). Data is
written to the data register on the rising edge of WE# when CE#, CLE, and ALE are LOW,
and the device is not busy.
Data is input on I/O[7:0] on x8 devices and on I/O[15:0] on x16 devices.
t
ALS
t
WP
t
DS
D
IN
t
WC
M
t
DH
t
WH
t
WP
t
D
DS
IN
21
M+1
t
DH
Asynchronous Interface Bus Operation
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb x8, x16: NAND Flash Memory
t
WP
t
DS
D
IN
N
t
t
t
CLH
DH
CH
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