MT29F1G08ABADAWP-IT:D Micron Technology Inc, MT29F1G08ABADAWP-IT:D Datasheet - Page 56

• Manufacturer Part Number: MT29F1G08ABADAWP-IT:D
• Manufacturer: Micron Technology Inc

Specifications of MT29F1G08ABADAWP-IT:D

• Lead Free Status / Rohs Status: Compliant

Program Operations
PROGRAM PAGE (80h-10h)
PDF: 09005aef83e5ffed
m68a.pdf – Rev. D 06/10 EN
Program operations are used to move data from the cache or data registers to the
NAND array. During a program operation the contents of the cache and/or data regis-
ters are modified by the internal control logic.
Within a block, pages must be programmed sequentially from the least significant page
address to the most significant page address (0, 1, 2, ….., 63). During a program opera-
tion, the contents of the cache and/or data registers are modified by the internal
control logic.
Program Operations
The PROGRAM PAGE (80h-10h) command programs one page from the cache register
to the NAND Flash array. When the die (LUN) is ready (RDY = 1, ARDY = 1), the host
should check the FAIL bit to verify that the operation has completed successfully.
Program Cache Operations
The PROGRAM PAGE CACHE (80h-15h) command can be used to improve program op-
eration system performance. When this command is issued, the die (LUN) goes busy
(RDY = 0, ARDY = 0) while the cache register contents are copied to the data register,
and the die (LUN) is busy with a program cache operation (RDY = 1, ARDY = 0. While
the contents of the data register are moved to the NAND Flash array, the cache register
is available for an additional PROGRAM PAGE CACHE (80h-15h) or PROGRAM PAGE
(80h-10h) command.
For PROGRAM PAGE CACHE series (80h-15h) operations, during the die (LUN) busy
times,
status operation (70h) and reset (FFh). When RDY = 1 and ARDY = 0, the only valid com-
mands during PROGRAM PAGE CACHE series (80h-15h) operations are status opera-
tion (70h), PROGRAM PAGE CACHE (80h-15h), PROGRAM PAGE (80h-10h), RANDOM
DATA INPUT (85h), PROGRAM FOR INTERNAL DATA INPUT (85h), and RESET (FFh).
The PROGRAM PAGE (80h-10h) command enables the host to input data to a cache
register, and moves the data from the cache register to the specified block and page ad-
dress in the array of the selected die (LUN). This command is accepted by the die (LUN)
when it is ready (RDY = 1, ARDY = 1). It is also accepted by the die (LUN) when it is busy
with a PROGRAM PAGE CACHE (80h-15h) operation (RDY = 1, ARDY = 0).
To input a page to the cache register and move it to the NAND array at the block and
page address specified, write 80h to the command register. Issuing the 80h to the com-
mand register clears all of the cache registers' contents on the selected target. Write n
address cycles containing the column address and row address. Data input cycles fol-
low. Serial data is input beginning at the column address specified. At any time during
the data input cycle the RANDOM DATA INPUT (85h) and PROGRAM FOR INTERNAL
DATA INPUT (85h) commands may be issued. When data input is complete, write 10h
to the command register. The selected LUN will go busy
(RDY = 0, ARDY = 0) for
To determine the progress of the data transfer, the host can monitor the target's R/B#
signal or, alternatively, the status operation (70h) may be used. When the die (LUN) is
ready (RDY = 1, ARDY = 1), the host should check the status of the FAIL bit.
t
CBSY and
t
LPROG, when RDY = 0 and ARDY = 0, the only valid commands are
t
PROG as data is transferred.
56
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb x8, x16: NAND Flash Memory
Program Operations
© 2010 Micron Technology, Inc. All rights reserved.