MT29F1G08ABADAWP-IT:D Micron Technology Inc, MT29F1G08ABADAWP-IT:D Datasheet - Page 55

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MT29F1G08ABADAWP-IT:D

Manufacturer Part Number
MT29F1G08ABADAWP-IT:D
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F1G08ABADAWP-IT:D

Lead Free Status / Rohs Status
Compliant

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0
READ PAGE CACHE LAST (3Fh)
Figure 38: READ PAGE CACHE LAST (3Fh) Operation
PDF: 09005aef83e5ffed
m68a.pdf – Rev. D 06/10 EN
Cycle type
I/O[7:0]
RDY
(SEQUENTIAL OR RANDOM)
READ PAGE CACHE
Page Address N
As defined for
Command
31h
t
WB
t
RCBSY
The READ PAGE CACHE LAST (3Fh) command ends the read page cache sequence and
copies a page from the data register to the cache register. This command is accepted by
the die (LUN) when it is ready (RDY = 1, ARDY = 1). It is also accepted by the die (LUN)
during READ PAGE CACHE (31h, 00h-31h) operations (RDY = 1 and ARDY = 0).
To issue the READ PAGE CACHE LAST (3Fh) command, write 3Fh to the command reg-
ister. After this command is issued, R/B# goes LOW and the die (LUN) is busy
(RDY = 0, ARDY = 0) for
ready (RDY = 1, ARDY = 1). At this point, data can be output from the cache register,
beginning at column address 0. The RANDOM DATA READ (05h-E0h) command can be
used to change the column address of the data being output from the cache register.
t
RR
D
D0
OUT
D
OUT
t
RCBSY. After
D
D
OUT
55
n
Command
t
3Fh
RCBSY, R/B# goes HIGH and the die (LUN) is
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb x8, x16: NAND Flash Memory
t
WB
t
RCBSY
t
RR
D
© 2010 Micron Technology, Inc. All rights reserved.
D0
OUT
Read Operations
Page N
D
OUT
D
D
OUT
n

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