PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 162
PSB2186N-V11TR
Manufacturer Part Number
PSB2186N-V11TR
Description
IC ISDN SUBSCRIB ACCESS 44-PLCC
Manufacturer
Infineon Technologies
Datasheet
1.PSB2186N-V11TR.pdf
(240 pages)
Specifications of PSB2186N-V11TR
Controller Type
Subscriber Access Controller (ISDN)
Interface
4-Wire SPI Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
17mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
PSB2186N-V11INTR
PSB2186N-V11TR
PSB2186N-V11TR
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OV
RBC8-11Receive Byte Count
Note:
4.1.21
Value after reset: 00
a) WRITE
MULT
b) READ
WFA
MULT
TREC
SDET
Semiconductor Group
Used to enable or disable the multiframe structure (see chapter 2.4.9)
1: S/T multiframe disabled
0: S/T multiframe enabled
Waiting for Acknowledge
This bit shows, if the last transmitted I frame was acknowledged, i.e. V(A) = V(S)
(
The value written into the register bit is read.
Timer Recovery Status:
0: The device is not in the timer recovery state.
1: The device is in the timer recovery state.
S Frame Detected:
This bit is set to "1" by the first received correct I frame or S command with p = 1.
It is reset by reading STAR2.
7
7
Status Register 2
Overflow
A "1" in this bit position indicates a message longer than 4095 bytes.
Four most significant bits of the total number of bytes in a received message.
Normally RBCH and RBCL should be read by the processor after an RME interrupt
in order to determine the number of bytes to be read from the RFIFO, and the total
message length. The contents of the registers are valid only after an RME interrupt,
and remain so until the frame is acknowledged via the RMC bit.
WFA = 0) or was not yet acknowledged, i.e. V(A) < V(S) (
0
0
H
0
0
0
0
0
0
162
WFA
0
STAR2
MULT
MULT
Read/Write Address 2B
TREC
0
Register Description
SDET
WFA = 1).
0
0
0
H
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