PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 199

• Manufacturer Part Number: PSB2186N-V11TR
• Description: IC ISDN SUBSCRIB ACCESS 44-PLCC
• Manufacturer: Infineon Technologies

Specifications of PSB2186N-V11TR

• Controller Type: Subscriber Access Controller (ISDN)
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PSB2186N-V11INTR; PSB2186N-V11TR

6.3.2.2
Error conditions and other states of the ISAC-S TE must be reported to higher layers. This
reporting is realized by a few macros which are executed when such conditions are detected.
These macros can be mapped to any form of message a higher layer software requires. Any
kind of immediately necessary actions may be defined in those macros as well. By using such
constructs the code can be kept compact and clearly readable.
Layer 1 Related Status Message
DECODE_L1_STATUS
HDLC Controller Related Status and Error Messages
CRC_ERROR
MISSING_ACKNOWLEDGE
MMU_ERROR
N201_ERROR
PEER_REC_READY
PEER_REC_BUSY
PROTOCOL_ERROR
REC_FRAME_OVERFLOW
REC_DATA_OVERFLOW
REC_ABORTED
TX_ACKNOWLEDGE
TIN_ERROR
TX_DATA_UNDERRUN
XMR_ERROR
Following macros are used when a ’timer recovery status’ (register STAR2, bit TREC) is
recognized.
ENABLE_TREC_STATUS_CHECK
DISABLE_TREC_STATUS_CHECK disable ’timer recovery status’ check procedure.
Semiconductor Group
Macro Definitions
Peer receive busy.
Receive frame overflow.
Receive data overflow (RDO interrupt).
Transmit data underrun (XDU interrupt).
for L1 status (IC-channel indication) decoding.
CRC error.
A ’Missing HDLC I-frame acknowledge’ is generated
when an acknowledge message for a previously
sent I frame is outstanding and the HDLC-message
transfer mode is changed from auto-mode to non-
auto mode. An outstanding acknowledge is
indicated by the ISAC-S TE in register STAR2 (’timer
recovery status’ and ’waiting for acknowledge’ bits).
No memory available to store incoming frame.
N201 error, HDLC frame is too long.
Peer receiver ready.
Protocol error (PCE interrupt).
Receive aborted (RAB interrupt).
Transmit frame acknowledge.
TIN interrupt, status enquiry.
Transmit message repeat indication (XMR interrupt).
enable ’timer recovery status’ check procedure.
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Low Level Controller