PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 40

• Manufacturer Part Number: PSB2186N-V11TR
• Description: IC ISDN SUBSCRIB ACCESS 44-PLCC
• Manufacturer: Infineon Technologies

Specifications of PSB2186N-V11TR

• Controller Type: Subscriber Access Controller (ISDN)
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PSB2186N-V11INTR; PSB2186N-V11TR

2.3.5
The command/indication channel carries real-time status information between the ISAC-S TE
and another device connected to the IOM.
1) One C/I channel (called C/I0) conveys the commands and indications between the layer-1
2) A second C/I channel (called C/I1) can be used to convey real time status information
Semiconductor Group
and the layer-2 parts of the ISAC-S TE. It can be accessed by an external layer-2 device
e.g. to control the layer-1 activation/deactivation procedures. C/I0 channel access may be
arbitrated via the TIC bus access protocol. In this case the arbitration is done in C/I
channel 2 (see figure 11).
The C/I0 channel is accessed via register CIR0 (in receive direction, layer-1 to layer-2) and
register CIX0 (in transmit direction, layer-2 to layer-1). The C/I0 code is four bits long.
A listing and explanation of the layer-1 C/I codes can be found in chapter 3.4.
In the receive direction, the code from layer-1 is continuously monitored, with an interrupt
being generated anytime a change occurs (ISTA:CISQ). A new code must be found in two
consecutive IOM frames to be considered valid and to trigger a C/I code change interrupt
status (double last look criterion).
In the transmit direction, the code written in CIX0 is continuously transmitted in C/I0.
between the ISAC-S TE and various non-layer-1 peripheral devices e.g. PSB 2160
ARCOFI. The channel consists of six bits in each direction (see figure 11).
The C/I1 channel is accessed via registers CIR1 and CIX1. A change in the received C/I1
code is indicated by an interrupt status without double last look criterion.
C/I-Channel Handling
40
Functional Description