PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 57

• Manufacturer Part Number: PSB2186N-V11TR
• Description: IC ISDN SUBSCRIB ACCESS 44-PLCC
• Manufacturer: Infineon Technologies

Specifications of PSB2186N-V11TR

• Controller Type: Subscriber Access Controller (ISDN)
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PSB2186N-V11INTR; PSB2186N-V11TR

Functional Description
2.4.8
D-Channel Access
The D channel is submitted to the D-channel access procedure according to CCITT
recommendation I.430.
The D-channel access procedure according to CCITT I.430 including priority management is
fully implemented in the ISAC-S:
If collision detection is programmed (MODE:DIM2-0), a collision is detected if either an echo
bit of "0" is recognized and a D bit of "1" was generated, or an echo bit of "1" is recognized and
a D bit of "0" was generated. When this occurs, D-channel transmission is immediately
stopped, and the echo channel is monitored to enable a subsequent D-channel access to be
attempted.
Stop/Go Bit
As the collision resolution is performed by the layer-1 part of the device, an information about
the D-channel status ("ready" or "busy") must be sent back to the layer-2 part to control HDLC
transmission. For this goal a Stop/Go (S/G) bit is transmitted over the IOM interface to the
layer-2 device.
The S/G bit is transmitted in bit 90 of an IOM-2 frame (12-byte structure) (see figure 19).
A logical "1" of the S/G bit indicates a collision on the S bus. By sending the S/G bit a logical
"0" to the layer-2 controller in anticipation of the S bus D channel "ready"-state, the first valid
0 bits will emerge from the layer-1 part at exactly that moment an access is becoming possible.
Selection of D-Channel Access Mode
For proper operation of the D-channel access procedure, the ISAC-S TE must be programmed
via the MODE (see chapter 4.1.7) register to evaluate the stop/go bit. This is achieved by
setting MODE:DIM2-0 to 001 or 011.
Selection of the Priority Class
The priority class (priority 8 or priority 10) is selected by transferring the appropriate activation
command via the Command/Indicate (C/I) channel of the IOM interface to the layer-1
controller. If the activation of the S interface is initiated by a TE, the priority class is selected
implicitly by the choice of the activation command. If the S-Interface is activated from the NT,
an activation command selecting the desired priority class should be programmed at the TE
on reception of the activation indication (AI8). In the activated state, the priority class may be
changed whenever required simply by programming the respective activation request
command (AR8 or AR10). The following table summarizes the C/I codes used for setting the
priority classes:
Semiconductor Group
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