PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 42

• Manufacturer Part Number: PSB2186N-V11TR
• Description: IC ISDN SUBSCRIB ACCESS 44-PLCC
• Manufacturer: Infineon Technologies

Specifications of PSB2186N-V11TR

• Controller Type: Subscriber Access Controller (ISDN)
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PSB2186N-V11INTR; PSB2186N-V11TR

channel) or by the ISAC-S TE itself (transmission of an HDLC frame). A software access
request to the bus is effected by setting the BAC bit (CIX0 register) to "1".
In the case of an access request, the ISAC-S TE checks the Bus Accessed-bit (bit 5 of IDP1
last octet of CH2, see figure 18) for the status "bus free", which is indicated by a logical "1". If
the bus is free, the ISAC-S TE transmits its individual TIC-bus address programmed in the
STCR register. The TIC bus is occupied by the device which sends its address error-free. If
more than one device attempt to seize the bus simultaneously, the one with the lowest address
values wins.
Figure 18
Structure of Last Octet of CH2 on IDP1 (DU)
When the TIC bus is seized by the ISAC-S TE, the bus is identified to other devices as
occupied via the IDP1 C/I Bus Accessed-bit state "0" until the access request is withdrawn.
After a successful bus access, the ISAC-S TE is automatically set into a lower priority class,
that is, a new bus access cannot be performed until the status "bus free" is indicated in two
successive frames.
If none of the devices connected to the IOM interface request access to the D- and C/I
channels, the TIC-bus address 7 will be present. The device with this address will therefore
have access, by default, to the D and C/I channels.
Note: Bit BAC (CIX0 register) should be reset by the P when access to the C/I channels is
The availability of the S/T interface D channel is indicated in bit 5 "Stop/Go" (S/G) of the IDP0
last octet of C/I channel (figure 19).
S/G = 1 : stop
S/G = 0 : go
Semiconductor Group
no more requested, to grant other devices access to the D- and C/I channels.
B1
B2
MON0
D
CI0
MR
MX
IC1
IC2
42
BAC
MON1
TIC-Bus Address
Bus Accessed
2
TAD
CI1
1
0
MR
MX
(’1’ no TIC-Bus Access)
(TAD 2-0)
Functional Description
TAD
BAC
ITD02575