PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 212
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PSB2186N-V11TR
Manufacturer Part Number
PSB2186N-V11TR
Description
IC ISDN SUBSCRIB ACCESS 44-PLCC
Manufacturer
Infineon Technologies
Datasheet
1.PSB2186N-V11TR.pdf
(240 pages)
Specifications of PSB2186N-V11TR
Controller Type
Subscriber Access Controller (ISDN)
Interface
4-Wire SPI Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
17mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
PSB2186N-V11INTR
PSB2186N-V11TR
PSB2186N-V11TR
- Current page: 212 of 240
- Download datasheet (2Mb)
}
/***************************************************************************/
/*
/*
/*
/*
/*
/*
/*
/*
/*
/***************************************************************************/
EXPORT int
SendFrame_ICC (pei, frame_type, cnt, frame_ptr)
{
Semiconductor Group
}
pt->pt_state
pt->pt_state |= PT_HDLC_RESET;
outp (pt->pt_r_cmdr, CMDR_RMC | CMDR_RHR | CMDR_XRES);
if (pt->pt_op_mode == PT_MD_AUTO)
outp (pt->pt_r_mask, 0);
return (ACK_DONE);
BYTE
WORD
FPTR
register PEITAB
BYTE
if (!(pt = GetPeitab_BASIC (pei)))
if (!(inp (pt->pt_r_star) & 0x40))
pt->pt_state
pt->pt_rx_frame
pt->pt_rx_cnt
outp (pt->pt_r_timr, inp(pt->pt_r_timr));
Function:
Parms
purpose :
return (ACK_NOT_SUPPORTED);
return (ACK_ACCESS_FAULT);
:
pei, frame_type;
cnt;
frame_ptr;
SendFrame_ICC ()
’pei’
’frame_type’ specifying the frame
’cnt’
’frame_ptr’
Initiate transmission of HDLC frames ( S, U, I, UI )
&= ~PT_REC_ACTIVE;
*pt;
cmd;
&= ~PT_REC_ACTIVE;
= 0x00;
= 0;
number of bytes to send
pointer to the data bytes
/* set the reset flag in the state
/* variable. This allows the
/* interrupt service routine to
/* react correctly on the following */
/* XPR interrupt
/* the reset commands:
/* - receive message complete (RME) */
/* - reset hdlc receiver
/* - transmitter reset
/* write TIMR register to stop the
/* internal timer in automode
/* now allow all interrupts again
/* return if XFIFO is not write
/* enable
/* return if transmit path still
/* blocked and not in automode
212
Low Level Controller
(RHR) */
(XRES)*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
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