PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 201

• Manufacturer Part Number: PSB2186N-V11TR
• Description: IC ISDN SUBSCRIB ACCESS 44-PLCC
• Manufacturer: Infineon Technologies

Specifications of PSB2186N-V11TR

• Controller Type: Subscriber Access Controller (ISDN)
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PSB2186N-V11INTR; PSB2186N-V11TR

6.5
6.5.1
ActL1_SBC ()
Initiates layer-1 activation. The appropriate CI code (activate request) is written to the CI
channel if the layer 1 is not already activated. ActL1_SBC then returns with ACK_DONE. The
subsequent status changes of the SBC will cause CI-channel status change (CISQ) interrupts
and these will be evaluated in the layer-1 interrupt service routine IntL1_SBC.
If the layer 1 is already activated nothing is carried out but ActL1_SBC calls
DECODE_L1_STATUS to report the activated state.
DeaL1_SBC ()
Initiates layer 1 deactivation. The appropriate CI code is written to the CI channel if the layer 1
is not already deactivated. The subsequent layer 1 status changes cause CI channel status
change (CISQ) interrupts and these will be evaluated in the layer 1 interrupt service routine
IntL1_SBC.
If the layer 1 is already deactivated nothing is carried out but DeaL1_SBC calls
DECODE_L1_STATUS to report the deactivated state.
ArL1_SBC ()
Activates a local loop in the SBC. The appropriate CI code (activate request loop) is written to
the SBC. ArL1_SBC returns with ACK_DONE. The subsequent status changes of the SBC will
generate CISQ interrupts and these will be evaluated and reported in the layer-1 interrupt
service routine IntL1_SBC.
EnaClk_SBC ()
EnaClk_SBC enables clocking in TE configurations when the layer 1 is in power-down state.
If first tests if clocks are actually there. If there are clocks the function returns with FALSE. If
there are no clocks (power-down state) the power-up procedure is implemented. The SPU bit
in register SPCR is set. The TIM code is written to the CI channel. EnaClk_SBC waits until the
power-up state (PU) is indicated before the SPU bit is reset to 0. The routine then returns with
TRUE.
InitL1_SBC ()
Initializes and resets the layer-1 controller (ResL1_SBC). Timing mode 0 is set and the TIC-
bus address is also programmed.
Semiconductor Group
LLC-Routine Reference
ISAC
®
-S TE Layer-1 Functions: The SBC Part
201
Low Level Controller