PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 195

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PSB2186N-V11TR

Manufacturer Part Number
PSB2186N-V11TR
Description
IC ISDN SUBSCRIB ACCESS 44-PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB2186N-V11TR

Controller Type
Subscriber Access Controller (ISDN)
Interface
4-Wire SPI Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
17mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
PSB2186N-V11INTR
PSB2186N-V11TR
6.2.3
The LLC-program listing shows some references to external functions (indicated by an
’IMPORT’ declaration). These functions are used by the LLC but are not part of it. These
external functions must be provided by the operating system or a higher layer protocol
software.
MMU_req ()
By calling MMU_req the ISAC-S TE LLC requests memory for the temporary storage of a
received data frame. The memory management unit (MMU) of the operating system has to
provide a memory buffer of the required size (max. 260 bytes).
MMU_free ()
MMU_free is the counterpart to MMU_req. The operating system can release a previously
allocated memory buffer.
STRING_IN () and STRING_OUT ()
STRING_IN and STRING_OUT are assembler written functions for fast input and output of
data frames from/to the ISAC-S FIFO.
ENTERNOINT () and LEAVENOINT ()
ENTERNOINT and LEAVENOINT are called to disable and enable all system interrupts in time
critical sections.
Decode_S_Frame_BASIC ()
Decode_S_Frame_BASIC is called by the LLC-interrupt server to transfer a received HDLC
S frame to a higher layer protocol software.
Following information is passed to Decode_S_Frame_BASIC:
’pei’:
’sapi’:
’tei’:
’ctrl’:
’frame_status’:
’M128’: 1-byte value. 0 in modulo 8 operating mode (1-byte control field), 1 in modulo 128
Semiconductor Group
1-byte value identifying the performed address recognition. The bits 0, 1 and 2 of
’pei’ represent the bits TA, SA0 and SA1 of the ISAC-S’ RSTA register.
1-byte value representing the received HDLC SAPI address byte. Bit 1 of ’sapi’ is
the C/R bit value (RSTA:CR). The most significant 6 bits of ’sapi’ are 0 in
auto-mode, non-auto mode and transparent mode.
1-byte value representing the received HDLC TEI address byte. ’tei’ is 0 in
auto-mode and non-auto mode.
2-byte value representing the contents of the received HDLC-control field.
External Functions
operating mode (2-byte control field). For correct decoding of ’ctrl’ above.
1 byte value
= 0 00: frame is valid.
= 0 80: frame is mutilated (last byte of two byte control field missing).
= 0 82: frame is too long. S frame with I field.
195
Low Level Controller

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