PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 173

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PIC18F6621-I/PT

Manufacturer Part Number
PIC18F6621-I/PT
Description
64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F6621-I/PT

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
54
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
3.8K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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17.4.9
The following steps should be taken when configuring
the ECCP1 module for PWM operation using Timer2:
1.
2.
3.
4.
5.
6.
7.
 2005 Microchip Technology Inc.
Configure the PWM pins, P1A and P1B (and
P1C and P1D, if used), as inputs by setting the
corresponding TRIS bits.
Set the PWM period by loading the PR2 register.
If auto-shutdown is required do the following:
• Disable auto-shutdown (ECCP1AS = 0)
• Configure source (FLT0, Comparator 1 or
• Wait for non-shutdown condition
Configure the ECCP1 module for the desired
PWM mode and configuration by loading the
CCP1CON register with the appropriate values:
• Select one of the available output
• Select the polarities of the PWM output
Set the PWM duty cycle by loading the CCPR1L
register and CCP1CON<5:4> bits.
For
dead-band delay by loading ECCP1DEL<6:0>
with the appropriate value.
If auto-shutdown operation is required, load the
ECCP1AS register:
• Select the auto-shutdown sources using the
• Select the shutdown states of the PWM
• Set the ECCP1ASE bit (ECCP1AS<7>).
• Configure the comparators using the CMCON
• Configure the comparator inputs as analog
Comparator 2)
configurations and direction with the
P1M1:P1M0 bits.
signals with the CCP1M3:CCP1M0 bits.
ECCP1AS2:ECCP1AS0 bits.
output pins using the PSS1AC1:PSS1AC0
and PSS1BD1:PSS1BD0 bits.
register.
inputs.
Half-Bridge
SETUP FOR PWM OPERATION
Output
mode,
set
PIC18F6525/6621/8525/8621
the
8.
9.
10. Enable PWM outputs after a new PWM cycle
17.4.10
Both Power-on Reset and subsequent Resets will force
all ports to Input mode and the CCP registers to their
Reset states.
This forces the Enhanced CCP module to reset to a
state compatible with the standard CCP module.
If auto-restart operation is required, set the
P1RSEN bit (ECCP1DEL<7>).
Configure and start TMR2:
• Clear the TMR2 interrupt flag bit by clearing
• Set the TMR2 prescale value by loading the
• Enable Timer2 by setting the TMR2ON bit
has started:
• Wait until TMRn overflows (TMRnIF bit is set).
• Enable the ECCP1/P1A, P1B, P1C and/or
• Clear the ECCP1ASE bit (ECCP1AS<7>).
the TMR2IF bit (PIR1<1>).
T2CKPS bits (T2CON<1:0>).
(T2CON<2>).
P1D pin outputs by clearing the respective
TRIS bits.
EFFECTS OF A RESET
DS39612B-page 171

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