PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 245

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: 64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6621-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 54
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.8K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

21.0
The
comparators. The inputs to the comparators are
multiplexed with the RF1 through RF6 pins. The on-
chip Voltage Reference (Section 22.0 “Comparator
Voltage Reference Module”) can also be an input to
the comparators.
REGISTER 21-1:
 2005 Microchip Technology Inc.
comparator
COMPARATOR MODULE
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
module
CMCON: COMPARATOR CONTROL REGISTER
C2OUT: Comparator 2 Output bit
When C2INV = 0:
1 = C2 V
0 = C2 V
When C2INV = 1:
1 = C2 V
0 = C2 V
C1OUT: Comparator 1 Output bit
When C1INV = 0:
1 = C1 V
0 = C1 V
When C1INV = 1:
1 = C1 V
0 = C1 V
C2INV: Comparator 2 Output Inversion bit
1 = C2 output inverted
0 = C2 output not inverted
C1INV: Comparator 1 Output Inversion bit
1 = C1 output inverted
0 = C1 output not inverted
CIS: Comparator Input Switch bit
When CM2:CM0 = 110:
1 = C1 V
0 = C1 V
CM2:CM0: Comparator Mode bits
Figure 21-1 shows the Comparator modes and the CM2:CM0 bit settings.
Legend:
R = Readable bit
-n = Value at POR
bit 7
C2OUT
R-0
C2 V
C2 V
contains
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+ > C2 V
+ < C2 V
+ < C2 V
+ > C2 V
+ > C1 V
+ < C1 V
+ < C1 V
+ > C1 V
- connects to RF5/AN10
- connects to RF3/AN8
- connects to RF6/AN11
- connects to RF4/AN9
C1OUT
R-0
two
IN
IN
IN
IN
IN
IN
IN
IN
-
-
-
-
-
-
-
-
PIC18F6525/6621/8525/8621
analog
C2INV
R/W-0
W = Writable bit
‘1’ = Bit is set
C1INV
R/W-0
The CMCON register, shown as Register 21-1, con-
trols the comparator input and output multiplexers. A
block diagram of the various comparator configurations
is shown in Figure 21-1.
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CIS
R/W-0
CM2
x = Bit is unknown
R/W-0
CM1
DS39612B-page 243
R/W-0
CM0
bit 0