DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 210
DS33R11+
Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS33R11.pdf
(344 pages)
Specifications of DS33R11+
Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
- Current page: 210 of 344
- Download datasheet (12Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Software Signaling Insertion Enable for Channels 17 to 24 (CH17 to CH24). These bits determine
which channels are to have signaling inserted from the transmit signaling registers.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 1 – 7: Software Signaling Insertion Enable for LCAW and Channels 16 to 22 (CH16 to CH22). These bits
determine which channels are to have signaling inserted from the transmit signaling registers.
Bit 0: Lower CAS Align/Alarm Word (LCAW). Selects the lower CAS align/alarm bits (xyxx) to be sourced from
the lower 4 bits of the TS1 register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Software Signaling Insertion Enable for Channels 22 to 30 (CH23 to CH30). These bits determine
which channels are to have signaling inserted from the transmit signaling registers.
0 = do not source signaling data from the TR.TSx registers for this channel
1 = source signaling data from the TR.TSx registers for this channel
0 = do not source signaling data from the TR.TSx registers for this channel
1 = source signaling data from the TR.TSx registers for this channel
0 = do not source the lower CAS align/alarm bits from the TR.TS1 register
1 = source the lower CAS alarm align/bits from the TR.TS1 register
0 = do not source signaling data from the TR.TSx registers for this channel
1 = source signaling data from the TR.TSx registers for this channel
CH24
CH22
CH30
7
0
7
0
7
0
TR.SSIE3 (T1 Mode)
Software Signaling-Insertion Enable 3
0Ah
TR.SSIE3 (E1 Mode)
Software Signaling Insertion Enable 3
0Ah
TR.SSIE4
Software Signaling Insertion Enable 4
0Bh
CH23
CH21
CH29
6
0
6
0
6
0
CH22
CH20
CH28
5
0
5
0
5
0
210 of 344
CH21
CH19
CH27
0
0
0
4
4
4
CH20
CH18
CH26
3
0
3
0
3
0
CH19
CH17
CH25
2
0
2
0
2
0
CH18
CH16
CH24
1
0
1
0
1
0
LCAW
CH17
CH23
0
0
0
0
0
0
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