DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 30

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
SDMASK[0]
SDMASK[1]
SDMASK[2]
SDMASK[3]
SDATA[10]
SDATA[11]
SDATA[12]
SDATA[13]
SDATA[14]
SDATA[15]
SDATA[16]
SDATA[17]
SDATA[18]
SDATA[19]
SDATA[20]
SDATA[21]
SDATA[22]
SDATA[23]
SDATA[24]
SDATA[25]
SDATA[26]
SDATA[27]
SDATA[28]
SDATA[29]
SDATA[30]
SDATA[31]
SDATA[0]
SDATA[1]
SDATA[2]
SDATA[3]
SDATA[4]
SDATA[5]
SDATA[6]
SDATA[7]
SDATA[8]
SDATA[9]
SDCLKO
SDA[10]
SDA[11]
SDA[0]
SDA[1]
SDA[2]
SDA[3]
SDA[4]
SDA[5]
SDA[6]
SDA[7]
SDA[8]
SDA[9]
NAME
W20
W19
W17
W16
W14
W12
W15
W13
W11
Y16
Y17
V18
Y19
V19
Y20
U19
U20
Y18
V17
Y15
Y14
V13
Y12
V12
Y10
V14
V16
V15
PIN
T19
T20
W2
W5
W6
W4
W3
W1
Y4
Y2
Y5
Y3
V5
V6
V4
V2
V3
V1
Y6
V7
Y8
(4mA)
TYPE
O
O
O
O
SDRAM Data Bus Bits 0 to 31: The 32 pins of the SDRAM data
bus are inputs for read operations and outputs for write operations.
At all other times, these pins are high-impedance.
Note: All SDRAM operations are controlled entirely by the
DS33R11. No user programming for SDRAM buffering is required.
SDRAM Address Bus 0 to 11: The 12 pins of the SDRAM address
bus output the row address first, followed by the column address.
The row address is determined by SDA0 to SDA11 at the rising
edge of clock. Column address is determined by SDA0-SDA9 and
SDA11 at the rising edge of the clock. SDA10 is used as an auto-
precharge signal.
Note: All SDRAM operations are controlled entirely by the
DS33R11. No user programming for SDRAM buffering is required.
SDRAM Mask 0 through 3: When high, a write is done for that
byte. The least significant byte is SDATA7 to SDATA0. The most
significant byte is SDATA31 to SDATA24.
SDRAM CLK Out: System clock output to the SDRAM. This clock
is a buffered version of SYSCLKI.
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FUNCTION

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