DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 71

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
9.20 Committed Information Rate Controller
The DS33R11 provides a CIR provisioning facility. The CIR can be used restricts the transport of received MAC
data to a programmable rate. The CIR location is shown in the
the Receive MAC to Transmit HDLC. This can be used for provisioning and billing functions towards the WAN. The
user must set the CIR register to control the amount of data throughput from the MAC to HDLC transmit. The CIR
register is in granularity of 500kbit/s with a range of 0 to 52Mbit/s. The operation of the CIR is as follows:
The CIR block counts the credits that are accumulated at the end of every 125ms.
If data is received and stored in the SDRAM to be sent to the Serial Interface, the interface will request the
data if there is a positive credit balance. If the credit balance is negative, transmit interface does not
request data.
New credit balance is calculated credit balance = old credit balance – frame size in bytes after the frame
is sent.
The credit balance is incremented every 125ms by CIR/8.
Credit balances not used in 250ms are reset to 0.
The maximum value of CIR can not exceed the transmit line rate.
If the data rate received from the Ethernet interface is higher than the CIR, the receive queue buffers will fill
and the high threshold water mark will invoke flow control to reduce the incoming traffic rate.
The CIR function is only available for software mode of operation only.
CIR function is only available in data received at the Ethernet Interface to be sent to WAN. There is not
CIR functionality for data arriving from the WAN to be sent to the Ethernet Interface.
Negative credits are not allowed, if there is not a credit balance, no frames are sent until there is a credit
balance again.
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Figure
6-1. The CIR will restrict the data flow from

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