DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 305

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Figure 12-14. Receive-Side 2.048MHz Boundary Timing (Elastic Store Enabled)
Figure 12-15. Transmit-Side D4 Timing
FRAME#
TSSYNC
TSYNC
TSYNC
TSYNC
NOTE 1: TSYNC IN THE FRAME MODE (TR.IOCR1.2 = 0) AND DOUBLE-WIDE FRAME SYNC IS NOT ENABLED (TR.IOCR1.1 = 0).
NOTE 2: TSYNC IN THE FRAME MODE (TR.IOCR1.2 = 0) AND DOUBLE-WIDE FRAME SYNC IS ENABLED (TR.IOCR1.1 = 1).
NOTE 3: TSYNC IN THE MULTIFRAME MODE (TR.IOCR1.2 = 1).
RCHBLK
RSYSCLK
RSER O
RMSYNC
RCHCLK
RSYNC
RSYNC
2
3
1
NOTE 1: RSERO DATA IN CHANNELS 1, 5, 9, 13, 17, 21, 25, AND 29 ARE FORCED TO 1.
NOTE 2: RSYNC IS IN THE OUTPUT MODE (TR.IOCR1.4 = 0).
NOTE 3: RSYNC IS IN THE INPUT MODE (TR.IOCR1.4 = 1).
NOTE 4: RCHBLK IS FORCED TO 1 IN THE SAME CHANNELS AS RSERO (SEE NOTE 1).
NOTE 5: THE F-BIT POSITION IS PASSED THROUGH THE RECEIVE-SIDE ELASTIC STORE.
RSIG
3
2
4
1
1
2
3
CHANNEL 31
4
A
CHANNEL 31
B
5
C/A D/B
6
LSB MSB
7
305 of 344
8
9
CHANNEL 32
10
A
CHANNEL 32
11
B
12
C/A D/B
LSB
1
F
5
2
CHANNEL 1
3
CHANNEL 1
4
5

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