DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 339

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Figure 14-2. TAP Controller State Diagram
14.2 Instruction Register
The instruction register contains a shift register as well as a latched parallel output and is 3 bits in length. When
the TAP controller enters the Shift-IR state, the instruction shift register is connected between JTDI and JTDO.
While in the Shift-IR state, a rising edge on JTCLK with JTMS LOW will shift the data one stage towards the serial
output at JTDO. A rising edge on JTCLK in the Exit1-IR state or the Exit2-IR state with JTMS HIGH will move the
controller to the Update-IR state. The falling edge of that same JTCLK will latch the data in the instruction shift
register to the instruction parallel output. Instructions supported by the DS26521 and its respective operational
binary codes are shown in
1
0
Test Logic
Reset
Run Test/
Idle
Table
0
14-1.
1
0
1
Capture DR
Update DR
1
Pause DR
Select
DR-Scan
Exit2 DR
Shift DR
Exit DR
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0
1
0
0
1
0
1
1
0
0
1
0
1
Capture IR
1
Update IR
Pause IR
Select
IR-Scan
Shift IR
Exit2 IR
Exit IR
0
1
1
1
0
0
0
1
1
0
0

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