DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 70
DS33R11+
Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS33R11.pdf
(344 pages)
Specifications of DS33R11+
Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
- Current page: 70 of 344
- Download datasheet (12Mb)
The X86 received frame is aborted if:
For the transmitter if X.86 is enabled the sequence of processing is as follows:
Note that the serial transmit and receive registers apply to the X.86 implementations with specific exceptions. The
exceptions are outlined in the serial interface transmit and receive register sections.
•
•
•
•
•
Construct frame including start flag, SAPI, Control and MAC frame.
Calculate FCS.
Perform transparency processing - 7E is translated to 7D5E, 7D is translated to 7D5D.
Append the end flag(7E).
Scramble the sequence X
•
•
•
•
•
If 7d,7E is detected. This is an abort packet sequence in X.86.
Invalid FCS is detected.
The received frame has less than 6 octets.
Control, SAPI and address field are mismatched to the programmed value.
Octet 7d and octet other than 5d,5e,7e or dd is detected.
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70 of 344
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