TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 256

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

(0x4005_00E0)
(0x4005_0048)
VEMODE0
VEMODE1
15.4.3 Channel-Specific Registers
15.4.3.1
<PVIEN> Enables or disables phase interpolation.
<ZIEN> Enables or disables zero-current detection.
<OCRMD> Controls output operation (output OFF, output enable or EMG return).
The upper and lower register names correspond to channel 0 and channel 1 respectively.
bit Symbol
Read/Write
After reset
Read/Write
bit Symbol
After reset
Function
Function
VEMODE Register
Write as ‘0’
31
7
6
R/W
TMPM370 15-15
－
0
5
・・・
4
0x000000
－
R
Output control
00: Output OFF
01: Output enable
10: Reserved
11: Output OFF and
EMG return
3
OCRMD
R/W
00
2
Zero-
current
detection
0: Disable
1: Enable
ZIEN
R/W
Vector Engine (VE)
9
1
0
Phase
interpolation
0: Disable
1: Enable
TMPM370
PVIEN
R/W
8
0
0