TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 425

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

7.
8.
9.
10. The 37th to 40th bytes, transmitted from the target board to the controller, are 0x00,
11. The 45th and 46th bytes transmitted are 0x00, 0x00.
12. The 47th to 50th bytes, transmitted from the target board to the controller, indicate the
13. The 51st to 54th bytes, transmitted from the target board to the controller, indicate the
14. The 55th to 56th bytes, transmitted from the target board to the controller, indicate the
15. The 57th to 83rd bytes, transmitted from the target board to the controller, contain
16. The 93rd byte, transmitted from the target board to the controller, is a checksum value
17. The 94th byte is the next command code.
number of flash blocks available, are 0x06 and 0x00.
The 25th to 28th bytes, transmitted from the target board to the controller, indicate the
start address of the on-chip RAM, are 0x00, 0x00, 0x00 and 0x20.
The 29th to 32nd bytes, transmitted from the target board to the controller, are dummy
data (0x00, 0x00, 0x00 and 0x00).
The 33rd to 36th bytes, transmitted from the target board to the controller, indicate the
end address of the on-chip RAM, are 0xFF, 0x27, 0x00 and 0x20.
0x00, 0x00 and 0x00. The 41st to 44th bytes, transmitted from the target board to the
controller, are 0x00, 0x00, 0x00 and 0x00.
start address of the on-chip flash memory, are 0x00, 0x00, 0x80, and 0x3F.
end address of the on-chip flash memory, are 0xFF, 0xFF, 0x83 and 0x3F.
information about the flash blocks. Flash blocks of the same size are treated as a
group. Information about the flash blocks indicate the start address of a group, the size
of the blocks in that group (in halfwords) and the number of the blocks in that group.
The 57th to 65th bytes are the information about the 16-kbyte blocks. The 66th to 74th
bytes are the information about the 32-kbyte blocks. The 75th to 83rd bytes are the
information about the 64-kbyte blocks. The 84th to 92nd bytes are the information
about the 128-kbyte blocks. See Table 20-8 for the values of bytes transmitted.
for the 5th to 92nd bytes. The checksum value is calculated by adding all these bytes
together, dropping the carry and taking the two’s complement of the total sum.
TMPM370 20-33
Flash Memory Operation
TMPM370