TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 423

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TMPM370FYDFG

Manufacturer Part Number
TMPM370FYDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
QFP(14x20)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYDFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
2)
1.
2.
3.
4.
5.
6.
The processing of the 1st and 2nd bytes are the same as for the RAM Transfer
command.
The 3rd byte, which the target board receives from the controller, is a command. The
code for the Show Flash Memory Sum command is 20H.
The 4th byte, transmitted from the target board to the controller, is an acknowledge
response to the 3rd byte. Before sending back the acknowledge response, the boot
program checks for a receive error. If there was a receive error, the boot program
transmits x8H (bit 3) and returns to the command wait state again. In this case, the
upper four bits of the acknowledge response are undefined - they hold the same
values as the upper four bits of the previously issued command. When the SIO0 is
configured for I/O Interface mode, the boot program does not check for a receive error.
If the 3rd byte is equal to any of the command codes listed in Table 20-4, the boot
program echoes it back to the controller. When the Show Flash Memory Sum
command was received, the boot program echoes back a value of 0x20 and then
branches to the Show Flash Memory Sum routine. If the 3rd byte is not a valid
command, the boot program sends back 0xN1 (bit 0) to the controller and returns to
the command wait state (the third byte) again. In this case, the upper four bits of the
acknowledge response are undefined - they hold the same values as the upper four
bits of the previously issued command.
The Show Flash Memory Sum routine adds all the bytes of the flash memory together.
The 5th and 6th bytes, transmitted from the target board to the controller, indicate the
upper and lower bytes of this total sum, respectively. For details on sum calculation,
see a later section “Calculation of the Show Flash Memory Sum Command”.
The 7th byte is a checksum value for the 5th and 6th bytes. To calculate the checksum
value, add the 5th and 6th bytes together, drop the carry and take the two’s
complement of the sum. Transmit this checksum value from the controller to the target
board.
The 8th byte is the next command code.
Show Flash Memory Sum Command (See Table 20-7)
TMPM370 20-31
Flash Memory Operation
TMPM370

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