TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 50

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

7.5 Interrupts
External
interrupt
pin
7.5.1
Therefore, appropriate settings must be made in the clock generator.
the CPU (route1).
interrupt pin (route 3) are input to the clock generator and are input to the CPU through the logic for
releasing standby (route 4 and 5).
the CPU, not through the logic for standby release (route 6).
7.5.1.1
This chapter describes routes, factors and required settings of interrupts.
The CPU is notified of interrupts by the interrupt signal from each interrupt source.
It sets priority on the interrupts and handles an interrupt request with the highest priority.
Interrupt requests for clearing a standby mode are notified to the CPU via the clock generator.
Fig7.1 shows an interrupt request route.
The interrupts issued by the peripheral function that is not used to release standby are directly input to
The peripheral function interrupts used to release standby (route 2) and interrupts from the external
If interrupts from the external interrupt pins are not used to release standby, they are directly input to
Interrupt factors
Interrupt route
Port
Peripheral
function
Peripheral
function
Rout 2
Rout 3
Fig 7.1
TMPM370 7-12
Clock generator
standby
Exiting
Interrupt Route
mode
<INTxEN>
Interrupt request Rout 1
Rout 5
Rout 6
CPU
TMPM370
Interrupt