Z16FMC32AG20EG Zilog, Z16FMC32AG20EG Datasheet - Page 152

• Manufacturer Part Number: Z16FMC32AG20EG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20EG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: - 40 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

Table 75. LIN-UART Mode Select and Status Register (UxMDSTAT)
PS028702-1210
Bits
3
2
1
0
Bits
Field
RESET
R/W
ADDR
Bits
7:5
LIN-UART Mode Select and Status Register
Description (Continued)
BRKD – Break Detect
This bit is set in LIN mode if (a) in LinSleep state and a break of at least 4 bit times occurred
(Wake-up event) or (b) in Slave Wait Break state and a break of at least 11 bit times occurred
(Break event), or (c) in Slave Active state and a break of at least 10 bit times occurs. Reading
the status 0 register or the receive data register clears this bit.
0 = No LIN break occurred.
1 = A LIN break occurred.
TDRE – Transmitter Data Register Empty
This bit indicates that the transmit data register is empty and ready for additional data. Writing
to the transmit data register resets this bit.
0 = Do not write to the transmit data register.
1 = The transmit data register is ready to receive an additional byte to be transmitted.
TXE – Transmitter Empty
This bit indicates that the transmit shift register is empty and character transmission is finished.
0 = Data is currently transmitting.
1 = Transmission is complete.
ATB – LIN Slave AutoBaud Complete
This bit is set in LIN SLAVE mode when an autobaud character is received. If the ABIEN bit is
set in the LIN control register then a receive interrupt is generated when this bit is set. Reading
the Status 0 register clears this bit. This bit will be 0 in LIN MASTER mode.
Description
MSEL – Mode Select
This R/W field determines which control register is accessed when performing a Write or Read
to the UART Control 1 register address. This field also determines which status is returned in
the mode status field when reading this register.
000 = Multiprocessor and normal UART control/status
001 = Noise Filter control/status
010 = LIN Protocol control/status
011–110: Reserved
111 = LIN-UART hardware revision (allows hardware revision to be read in the mode status
field).
R/W
7
0
This register contains mode select and status bits.
MSEL
R/W
6
0
R/W
5
0
P R E L I M I N A R Y
FF_E204H, FF_E214H
R
4
0
Z16FMC Series Motor Control MCUs
R
3
0
Mode Status
R
2
0
Product Specification
R
1
0
LIN-UART
R
0
0
130