Z16FMC32AG20EG Zilog, Z16FMC32AG20EG Datasheet - Page 242

• Manufacturer Part Number: Z16FMC32AG20EG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20EG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: - 40 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

Z16FMC Series Motor Control MCUs
Product Specification
220
Buffers
A buffer is an allocation of contiguous memory bytes. Buffers are allocated by software to
be used by the DMA. The DMA transfers data to or from buffers. A typical application
2
would be to send data to serial channels such as I
C, UART and SPI. The data to be sent is
placed in a buffer by software.
Frames
A frame is a single buffer or a collection of buffers. Frame boundaries spans multiple 
buffers.
Source Address Register
The source address register (SAR) points to the data to be transferred. Each time a transfer
occurs the SAR is selected to stay fixed or increment/decrement by the size of the transfer
(example 1, 2, 4). If we were sending data to a serial channel, the SAR points to the data to
be transferred and the SAR would be set to increment or decrement depending on the
order of data in the buffer (ascending or desending).
Destination Address Register
The destination address register (DAR) points to the location to store the data transferred
from the address pointed to by the SAR. Each time a transfer occurs the DAR is selected
to stay fixed or increment/decrement by the size of the transfer (for example, 1, 2 and 4).
When sending data to a serial channel, the DAR points to the data register of the serial
channel and is set to a fixed address. Each transfer is then sent to the serial channel data
register because the DAR would not change.
Transfer Length
The transfer length register (TXLN) is used to specify how many transfers need to occur to
transfer this buffer. If we were sending bytes to a serial channel, the value of the number of
bytes in the buffer pointed to by the SAR would be placed in this register. Each time a
PS028702-1210
P R E L I M I N A R Y
DMA Controller