Z16FMC32AG20EG Zilog, Z16FMC32AG20EG Datasheet - Page 188

• Manufacturer Part Number: Z16FMC32AG20EG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20EG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: - 40 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

Table 93. ESPI Status Register (ESPISTAT)
PS028702-1210
Bits
4:2
1
0
Bits
Field
RESET
R/W
ADDR
R/W* = Read access. Write a 1 to clear the bit to 0.
Bits
7
ESPI Status Register
Description (Continued)
NUMBITS[2:0] – Number of Data Bits Per Character to Transfer
This field contains the number of bits to shift for each character transfer. For information about
valid bit positions when the character length is less than 8 bits, see the
section on page 161.
000 = 8 bits
001 = 1 bit
010 = 2 bits
011 = 3 bits
100 = 4 bits
101 = 5 bits
110 = 6 bits
111 = 7 bits
SSIO – Slave Select I/O
This bit controls the direction of the SS pin. In single Master mode, SSIO is set to 1 unless a
separate GPIO pin is being used to provide the SS output function. In the SPI Slave or Multi-
Master configuration SSIO is set to 0.
0 = SS pin configured as an input (SPI Slave and Multi-Master modes)
1 = SS pin configured as an output (SPI single Master mode)
SSPO – Slave Select Polarity
This bit controls the polarity of the SS pin.
0 = SS is active Low. (SSV = 1 corresponds to SS = 0)
1 = SS is active High. (SSV = 1 corresponds to SS = 1)
Description
TDRE – Transmit Data Register Empty
0 = Transmit data register is full or ESPI is disabled.
1 = Transmit data register is empty. A write to the ESPI (Transmit) Data Register clears this bit.
TDRE
R
7
0
The ESPI Status Register (see Table 93) indicates the current state of the ESPI. All bits
revert to their Reset state, if the ESPI is disabled.
TUND
R/W*
6
0
R/W*
COL
5
0
P R E L I M I N A R Y
R/W*
ABT
4
0
FF_E264H
ROVR
R/W*
Z16FMC Series Motor Control MCUs
3
0
Enhanced Serial Peripheral Interface
RDRF
R
2
0
Product Specification
ESPI Data Register
TFST
R
1
0
SLAS
R
0
1
166