Z16FMC32AG20EG Zilog, Z16FMC32AG20EG Datasheet - Page 195

Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D

Z16FMC32AG20EG

Manufacturer Part Number
Z16FMC32AG20EG
Description
Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet

Specifications of Z16FMC32AG20EG

Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
- 40 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
 Details

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Part Number:
Z16FMC32AG20EG
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Table 98. I
PS028702-1210
Name
I
I
I
I
I
I
I
I
2
2
2
2
2
2
2
2
C Data
C Interrupt Status
C Control
C Baud Rate High
C Baud Rate Low
C State
C Mode
C Slave Address
Comparison with Master Mode only I
2
C Master/Slave Controller Registers
Porting code written for the Master-only I
to the I
and I2CBRL register definitions are not changed. The difference between the Master-Only
I
2
C Controller and the I
The Status register (I2CSTATE) from the Master-only I
Interrupt Status (I2CISTAT) register and the State (I2CSTATE) register because there
are more interrupt sources. The
DS) bits formerly in the Status Register are moved to the State Register.
The I2CSTATE register is called as Diagnostic State (I2CDST) register in the Master
Only mode version. The I2CDST register provides diagnostic information. The
I2CSTATE register contains status and state information that are useful to software in
operational mode.
The I2CMODE register is called as Diagnostic Control (I2CDIAG) register in the
MASTER ONLY mode version. The I2CMODE register provides control for SLAVE
modes of operation as well as the most significant two bits of the 10-bit slave address.
The I2CSLVAD register is added for programming the slave address.
The ACKV bit in the I2CSTATE Register enables the Master to verify the Acknowl-
edge from the Slave before sending the next byte.
Support for multi-master environments. If arbitration is lost when operating as a Mas-
ter, the ARBLST bit in the I2CISTAT Register is set and the mode automatically
switches to Slave mode.
2
Abbreviation
I2CDATA
I2CISTAT
I2CCTL
I2CBRH
I2CBRL
I2CSTATE
I2CMODE
I2CSLVAD
C Master/Slave Controller is straightforward. The I2CDATA, I2CCTL, I2CBRH
Description
Transmit/Receive Data Register
Interrupt Status Register
Control Register – basic control functions
High byte of baud rate generator initialization value
Low byte of baud rate generator initialization value
State Register
Selects Master or Slave modes, 7-bit or 10-bit addressing. Config-
ures address recognition, Defines Slave Address bits [9:8].
Defines Slave Address bits [7:0]
2
C Master/Slave Controller designs is explained below.
P R E L I M I N A R Y
ACK
,
10B
2
C Controller found on other Z8 Encore!
2
,
C Controller
TAS
Z16FMC Series Motor Control MCUs
(now called AS) and
2
C Controller is split into the
I2C Master/Slave Controller
Product Specification
DSS
(now called
®
parts
173

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