H27U8G8T2BTR-BC HYNIX SEMICONDUCTOR, H27U8G8T2BTR-BC Datasheet - Page 6

58T1893

H27U8G8T2BTR-BC

Manufacturer Part Number
H27U8G8T2BTR-BC
Description
58T1893
Manufacturer
HYNIX SEMICONDUCTOR
Datasheet

Specifications of H27U8G8T2BTR-BC

Memory Type
Flash - NAND
Memory Size
8192Mbit
Memory Configuration
1024M X 8
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
No. Of Pins
48
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes

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Manufacturer
Quantity
Price
Part Number:
H27U8G8T2BTR-BC
Manufacturer:
HYNIX
Quantity:
10 000
Part Number:
H27U8G8T2BTR-BC
Manufacturer:
HYNIX
Quantity:
4 000
Rev 0.0 / Jul. 2008
1.2 PIN DESCRIPTION
NOTE :
1. A 0.1uF capacitor should be connected between the Vcc Supply Voltage pin and the Vss Ground pin to decouple the
Pin Name
IO0 ~ IO7
current surges from the power supply. The PCB track widths must be sufficient to carry the currents required during
program and erase operations.
CLE
ALE
R/B
WE
WP
Vcc
Vss
CE
RE
NC
DATA INPUTS/OUTPUTS
The IO pins allow to input command, address and data and to output data during read / program
operations. The inputs are latched on the rising edge of Write Enable (WE). The I/O buffer float to
High-Z when the device is deselected or the outputs are disabled.
COMMAND LATCH ENABLE
This input activates the latching of the IO inputs inside the Command Register on the Rising edge of
Write Enable (WE).
ADDRESS LATCH ENABLE
This input activates the latching of the IO inputs inside the Address Register on the Rising edge of
Write Enable (WE).
CHIP ENABLE
This input controls the selection of the device.
WRITE ENABLE
This input acts as clock to latch Command, Address and Data. The IO inputs are latched on the rise
edge of WE.
READ ENABLE
The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is
valid tREA after the falling edge of RE which also increments the internal column address counter by
one.
WRITE PROTECT
The WP pin, when Low, provides an Hardware protection against undesired modify (program / erase)
operations.
READY BUSY
The Ready/Busy output is an Open Drain pin that signals the state of the memory.
SUPPLY VOLTAGE
The Vcc supplies the power for all the operations (Read, Write, Erase).
GROUND
NO CONNECTION
Table 2 : Pin Description
Description
8 Gbit (1024 M x 8 bit) NAND Flash
H27U8G8T2B Series
Preliminary
6

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