M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 82

• Manufacturer Part Number: M28529G-12
• Description: ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of M28529G-12

• Package: 484BGA
• Utopia Type: Level 2
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.71|3.135 V
• Maximum Operating Supply Voltage: 1.89|3.465 V
• Maximum Output Rate: 8.192 Mbps

1.8
Far-End Line loopback verifies Line interface is communicating with the PHY. It is enabled by bit 4 of the PMODE
register (0x04). When line loopback is enabled for a given port, all data received by the M2852x on that port is
processed by the Receive Line Interface and transmitted out the line interface. Data from the Transmit UTOPIA bus
is ignored.
Figure 1-13. Far-End Line Loopback (This only shows the TC Block.)
28529-DSH-001-K
SPRxSync
SPTxSync
SPRxData
SPRxHold
SPTxData
SPRxClk
SPTxClk
Interface
General Note:
Framer
Configuring a port for line loopback mode disables all UTOPIA signals for that port.
(Line)
NOTE:
This segment is replicated for Ports 0 - 7
Far-End Line Loopback (Serial Configuration Only)
Loopback
Control
SPTxClk, SPRxClk, SPTxSync, and SPRxSync must be present for
the loopback mode to function properly for a given port.
TC Transmit Port
TC Receive Port
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Alignment
Cell
ATM Cell Transmitter
ATM Cell Receiver
VPI/VCI Screening
Cell Validation
®
4-cell
FIFO
4-cell
FIFO
Interface
Interface
Transmit
UTOPIA
UTOPIA
Receive
Level 2
Level 2
IMA
IMA
Functional Description
UTOPIA
Level 2
Interface
atmUTxClk
atmUTxClAv
atmUTxEnb*
atmUTxSOC
atmUTxData[15:0]
atmUTxPrty
atmUTxAddr[4:0]
atmURxClk
atmURxClAv
atmURxEnb*
atmURxSOC
atmURxData[15:0]
atmURxPrty
atmURxAddr[4:0]
500027_058
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