M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 90

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M28529G-12

Manufacturer Part Number
M28529G-12
Description
ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of M28529G-12

Package
484BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3.135 V
Maximum Operating Supply Voltage
1.89|3.465 V
Maximum Output Rate
8.192 Mbps
Table 1-23.
1.12.2.3
The internal clock generators and synthesizers operate in the IMA_SysClk domain but are referenced from either
the IMA_SysClk or IMA_RefClk input. Due to internal synchronization circuitry, the following restriction applies to
the IMA_RefClk input when it is used as a reference for these generators:
Frequency of IMA_RefClk > Frequency of IMA_SysClk / 16
1.12.3
The preceding sections listed many constraints on the IMA_SysClk and IMA_RefClk inputs.
some simplified (and conservative) examples for these two clock signals.
28529-DSH-001-K
Footnotes:
(1) Clock period is shown since the sampling circuit is sensitive to the interval between rising edges of the clock signal.
(2) Limit is a function of whether bit rate generator is used. If not used, then IMA_SysClk caps the link rate. If used, the intermediate
(3) IMA_RefClk used as a line rate reference; In this case, IMA_RefClk is not used as a reference for the internal bit rate generator.
IMA_RefClk
frequency (INT_FREQ) determines the maximum link rate with the requirement that INT_FREQ ≤ IMA_SysClk / 16.
SPRxClk
IHRxClk
Signal
Interface
(3)
IMA Serial Clock Requirements
Clock Generator Reference
Summary Examples
T1/E1/DSL
FT1/FE1
FT1/FE1
Mode
T1/E1
All
Mindspeed Proprietary and Confidential
Mindspeed Technologies
256 / IMA_SysClk
256 / IMA_SysClk
Maximum
N/A
N/A
N/A, f = 8.192 MHz
Clock Period
16 / IMA_SysClk
(1)
4 / IMA_SysClk
Minimum
N/A
N/A
®
Min (4 / IMA_SysClk, INT_FREQ / 4)
Functional Description
IMA_SysClk / 16
IMA Link Rate
Maximum
INT_FREQ / 4
1.920 Mbps
2.048 Mbps
Table 1-24
(2)
provides
75

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