ATmega645P Atmel Corporation, ATmega645P Datasheet - Page 144
ATmega645P
Manufacturer Part Number
ATmega645P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645P
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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18.6
18.6.1
8285D–AVR–06/11
Compare Match Output Unit
Compare Output Mode and Waveform Generation
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
The setup of the OC2A should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC2A value is to use the Force Output Com-
pare (FOC2A) strobe bit in Normal mode. The OC2A Register keeps its value even when
changing between Waveform Generation modes.
Be aware that the COM2A[1:0] bits are not double buffered together with the compare value.
Changing the COM2A[1:0] bits will take effect immediately.
The Compare Output mode (COM2A[1:0]) bits have two functions. The Waveform Generator
uses the COM2A[1:0] bits for defining the Output Compare (OC2A) state at the next compare
match. Also, the COM2A[1:0] bits control the OC2A pin output source.
plified schematic of the logic affected by the COM2A[1:0] bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port Control Regis-
ters (DDR and PORT) that are affected by the COM2A[1:0] bits are shown. When referring to the
OC2A state, the reference is for the internal OC2A Register, not the OC2A pin.
Figure 18-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2A) from the Waveform
Generator if either of the COM2A[1:0] bits are set. However, the OC2A pin direction (input or
output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direc-
tion Register bit for the OC2A pin (DDR_OC2A) must be set as output before the OC2A value is
visible on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC2A state before the
output is enabled. Note that some COM2A[1:0] bits settings are reserved for certain modes of
operation.
The Waveform Generator uses the COM2A[1:0] bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM2A[1:0] = 0 tells the Waveform Generator that no action
COMnx1
COMnx0
FOCnx
clk
I/O
See ”Register Description” on page 154.
Waveform
Generator
D
D
PORT
D
DDR
OCnx
Q
Q
Q
1
0
Figure 18-4
shows a sim-
OCnx
Pin
144
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