ATmega645P Atmel Corporation, ATmega645P Datasheet - Page 18
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ATmega645P
Manufacturer Part Number
ATmega645P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645P
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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8. AVR Memories
8.1
8285D–AVR–06/11
In-System Reprogrammable Flash Program Memory
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
This section describes the different memories in the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P. The AVR archi-
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P fea-
tures an EEPROM Memory for data storage. All three memory spaces are linear and regular.
The ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P contains
16/32/64K bytes On-chip In-System Reprogrammable Flash memory for program storage. Since
all AVR instructions are 16 or 32 bits wide, the Flash is organized as 8K x 16. For software secu-
rity, the Flash Program memory space is divided into two sections, Boot Program section and
Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P Program Counter
(PC) is 13/14/15 bits wide, thus addressing the 8/16/32K program memory locations. The opera-
tion of Boot Program section and associated Boot Lock bits for software protection are described
in detail in
Programming” on page 283
using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
”Boot Loader Support – Read-While-Write Self-Programming” on page
15.
contains a detailed description on Flash data serial downloading
”Instruction Execution Tim-
266.
”Memory
18
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