ATmega645P Atmel Corporation, ATmega645P Datasheet - Page 44
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ATmega645P
Manufacturer Part Number
ATmega645P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645P
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10.11 Register Description
10.11.1
10.11.2
8285D–AVR–06/11
SMCR – Sleep Mode Control Register
MCUCR – MCU Control Register
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
The Sleep Mode Control Register contains control bits for power management.
• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 10-2.
Note:
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
Note:
• Bit 6 – BODS: BOD Sleep
The BODS bit must be written to logic one in order to turn off BOD during sleep, see
on page
BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first
be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be set to
zero within four clock cycles.
Bit
0x33 (0x53)
Read/Write
Initial Value
Bit
0x35 (0x55)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby mode is only recommended for use with external crystals or resonators.
1. Only available in the picoPower devices ATmega165PA/325PA/3250PA/645P/6450P.
39. Writing to the BODS bit is controlled by a timed sequence and an enable bit,
Sleep Mode Select
JTD
R/W
7
0
R
7
–
0
SM1
0
0
1
1
0
0
1
1
BODS
R/W
6
0
R
6
–
0
(1)
BODSE
R/W
R
5
0
5
–
0
SM0
0
1
0
1
0
1
0
1
(1)
PUD
R
R/W
4
–
0
0
4
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
Reserved
SM2
R/W
3
0
(1)
R
3
–
0
SM1
R/W
2
0
R
2
–
0
SM0
Table
R/W
IVSEL
1
0
R/W
1
0
10-2.
R/W
SE
IVCE
R/W
0
0
0
0
Table 10-1
MCUCR
SMCR
44
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