ATmega645P Atmel Corporation, ATmega645P Datasheet - Page 39
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ATmega645P
Manufacturer Part Number
ATmega645P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645P
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10. Power Management and Sleep Modes
10.1
10.2
Table 10-1.
10.3
8285D–AVR–06/11
Sleep Mode
Idle
ADC NRM
Power-down
Power-save
Standby
Overview
Sleep Modes
BOD Disable
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Active Clock Domains
(1)
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
Figure 9-1 on page 29
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P, and their distribu-
tion. The figure is helpful in selecting an appropriate sleep mode.
sleep modes and their wake up sources and BOD disable ability
Note:
Notes:
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses - see
322
period. To save power, it is possible to disable the BOD by software for some of the sleep-
modes, see
same level as when BOD is globally disabled by fuses. If BOD is disabled in software, the BOD
and onwards, the BOD is actively monitoring the power supply voltage during a sleep
X
1. BOD disable is only available for ATmega165PA/325PA/3250PA/645P/6450P
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt.
Table 10-1 on page
X
X
X
X
X
presents the different clock systems in the
Oscillators
X
X
X
39. The sleep mode power consumption will then be at the
X
X
X
(2)
(2)
X
X
X
X
X
(3)
(3)
(3)
(3)
X
X
X
X
X
Wake-up Sources
X
X
X
(2)
(1)
Table 10-2 on page 44
Table 10-1
.
X
X
X
X
Table 28-7 on page
shows the different
X
X
X
X
for a
39
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